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1 of 16 090905 features temperature measurements require no external components measures temperatures from -55c to +125c in 0.5c increments. fahr enheit equivalent is -67f to 257f in 0.9f increments temperature is read as a 9-bit value (2-byte transfer) wide power supply range (2.7v to 5.5v) converts temperature to digital word in less than 1 second thermostatic settings are user definable and nonvolatile data is read from/written via a 2-wire serial interface (open drain i/o lines) applications include thermostatic controls, industrial systems, consumer products, thermometers, or any thermal sensitive system 8-pin dip or so package (150mil and 208mil) pin assignment pin description sda - 2-wire serial data input/output scl - 2-wire serial clock gnd - ground t out - thermostat output signal a0 - chip address input a1 - chip address input a2 - chip address input v dd - power supply voltage description the ds1621 digital thermometer and thermostat provi des 9-bit temperature readings, which indicate the temperature of the device. the thermal alarm output, t out , is active when the temperature of the device exceeds a user-defined temperature th. the output remains active until the temperature drops below user defined temperature tl, allowing for any hysteresis necessary. user-defined temperature settings are stored in nonvol atile memory so parts ma y be programmed prior to insertion in a system. temperature settings and temperature readings are all communicated to/from the ds1621 over a simple 2-wire serial interface. ds1621 digital thermometer and thermostat www.maxim-ic.com 6 3 1 2 4 8 7 5 sd a t out gnd v dd a 0 a 1 a 2 ds1621s 8-pin so (150mil) ds1621v 8-pin so (208mil) 6 3 1 2 4 8 7 5 sd a scl t out gnd v dd a 0 a 1 a 2 ds1621 8-pin dip (300mil) scl
ds1621 2 of 16 ordering information ordering number package marking description ds1621 ds1621 ds1621 in 300 mil dip ds1621+ ds1621 (see note) ds1621 in lead-free 300 mil dip ds1621s ds1621 ds1621 in 150 mil soic ds1621s+ ds1621 (see note ) ds1621 in lead-free 150 mil soic ds1621s/t&r ds1621 ds1621 in 150 mil so, 2500 piece tape-and-reel ds1621s+t&r ds1621 (see note) ds 1621 in lead-free 150 mil so, 2500 piece tape-and-reel ds1621v ds1621v ds1621 in 208 mil soic ds1621v+ ds1621v (see note) ds1621 in lead-free 208 mil soic ds1621v/t&r ds1621v ds1621 in 208 mil so, 2500 piece tape-and-reel ds1621v+t&r ds1621v (see note) ds1621 in lead -free 208 mil so, 2500 piece tape-and-reel note: a ?+? symbol will also be marked on the package near the pin 1 indicator. table 1. detailed pin description pin symbol description 1 sda data input/output pin for 2- wire serial communication port. 2 scl clock input/output pin for 2- wire serial communication port. 3 t out thermostat output. active when temperature exceeds th; will reset when temperature falls below tl. 4 gnd ground pin. 5 a2 address input pin. 6 a1 address input pin. 7 a0 address input pin. 8 v dd supply voltage input power pin. (2.7v to 5.5v) operation measuring temperature a block diagram of the ds1621 is shown in figure 1. the ds1621 measures temperature using a bandgap-base d temperature sensor. a delta-sigma analog-to- digital converter (adc) converts the m easured temperature to a digital value that is calibrated in c; for f applications, a lookup table or c onversion routine must be used. the temperature reading is provided in a 9-bit, two?s complement reading by issuing the read temperature command. table 2 describes the exact relationship of output data to measured temperature. the data is transmitted through the 2-wire serial interface, msb first. the ds1621 can measure temperature over the range of -55 c to +125 c in 0.5 c increments.
ds1621 3 of 16 figure 1. ds1621 functional block diagram status register & control logic temperature sensor high temp trigger , th low temp trigger , tl digital comparator/logic address and i/o control scl sd a a0 a1 a2 t out
ds1621 4 of 16 table 2. temperature/data relationships temperature digital output (binary) digital output (hex) +125c 01111101 00000000 7d00h +25c 00011001 00000000 1900h +?c 00000000 10000000 0080h +0c 00000000 00000000 0000h -?c 11111111 10000000 ff80h -25c 11100111 00000000 e700h -55c 11001001 00000000 c900h since data is transmitted over the 2-wire bus msb first, temperature data may be written to/read from the ds1621 as either a single byte (with temperature resolution of 1 c) or as two bytes. the second byte would contain the value of the least significant (0.5 c) bit of the temperature reading as shown in table 1. note that the remaining 7 bits of this byte are set to all "0"s. temperature is represented in the ds1621 in terms of a ? c lsb, yielding the following 9-bit format: figure 2. temperature, th, and tl format t = -25 c higher resolutions may be obtained by r eading the temperature and truncating the 0.5 c bit (the lsb) from the read value. this value is temp_read. a r ead counter command should be issued to yield the count_remain value. the read slope comma nd should then be issued to obtain the count_per_c value. the higher resolution temperatur e may be then be calculated by the user using the following: temperature=temp_read-0.25 + c per count remain count c per count _ _ ) _ _ _ ( the ds1621 always powers up in a low power idle stat e, and the start convert t command must be used to initiate conversions. the ds1621 can be programmed to perform conti nuous consecutive conversions (continuous-conversion mode) or to perform single conversions on comma nd (one-shot mode). the conversion mode is programmed through the 1shot bit in the conf iguration register as explained in the operation and control section of this datasheet. in continuous conversion mode, the ds1621 begins continuous conversions after a start convert t command is i ssued. consecutive conversions continue to be performed until a stop convert t command is issued, at which time the device goes into a low-power idle state. continuous conversions can be restarte d at any time using the start convert t command. 1 1 1 0 0 1 1 1 0 0 0 0 0 0 0 0 msb lsb
ds1621 5 of 16 in one-shot mode, the ds1621 performs a single te mperature conversion when a start convert t command is issued. when the conversion is comple te, the device enters a low-power idle state and remains in that state until a single temperature conversion is again initiate d by a start convert t command. thermostat control in its operating mode, the ds1621 functions as a thermo stat with programmable hysteresis as shown in figure 3. the thermostat output updates as soon as a temperature conversion is complete. when the ds1621?s temperature meets or exceeds the valu e stored in the high temperature trip register (th), the output becomes active and will stay active until the temperature falls below the temperature stored in the low temperature trigger register (tl) . in this way, any amount of hysteresis may be obtained. the active state for the output is programmable by the user so that an active state may either be a logic "1" (v dd ) or a logic "0" (0v). this is done using the po l bit in the configuration reagister as explained in the operation and control section of this datasheet. figure 3. thermostat output operation dq (thermostat output, active = high) operation and control the ds1621 must have temperature settings resident in the th and tl registers for thermostatic operation. a configuration/status register also dete rmines the method of operation that the ds1621 will use in a particular application, as well as indicating the status of the temperature conversion operation. the configuration register is defined as follows: msb bit 6 bit5 bit 4 bit 3 bit 2 bit 1 lsb done thf tlf nvb x x pol 1shot where done = conversion done bit. ?1? = conversion complete, ?0? = conversion in progress. thf = temperature high flag. this bit will be set to ?1? when the temperature is greater than or equal to the value of th. it will remain ?1? until reset by writing ?0? into this location or removing power from the device. this feature provides a method of dete rmining if the ds1621 has ever been subjected to temperatures above th while power has been applied. tl th t ( c )
ds1621 6 of 16 tlf = temperature low flag. this bit will be set to ?1? when the temperature is less than or equal to the value of tl. it will remain ?1? until reset by writing ?0? into this location or removing power from the device. this feature provides a method of deter mining if the ds1621 has ever been subjected to temperatures below tl while power has been applied. nvb = nonvolatile memory busy flag. ?1? = write to an e 2 memory cell in progress, ?0? = nonvolatile memory is not busy. a copy to e 2 may take up to 10 ms. pol = output polarity bit. ?1? = active high, ?0? = active low. this bit is nonvolatile. 1shot = one shot mode. if 1shot is ?1?, the ds1621 will perform one temperature conversion upon receipt of the start convert t protocol. if 1s hot is ?0?, the ds1621 will continuously perform temperature conversions. this bit is nonvolatile. x = reserved. for typical thermostat operation the ds1621 will operate in continuous mode. however, for applications where only one reading is needed at certain times or to conserve power, the one-shot mode may be used. note that the thermostat output (t out ) will remain in the state it was in after the last valid temperature conversion cycle when operating in one-shot mode. 2-wire serial data bus the ds1621 supports a bidirectional 2- wire bus and data transmission pr otocol. a device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. the device that controls the message is called a ?master." the devices that are controlled by the master are ?slaves." the bus must be controlled by a master device which generates th e serial clock (scl), controls the bus access, and generates the start and stop conditions. the ds1621 operates as a slave on the 2-wire bus. connections to the bus are made via th e open-drain i/o lines sda and scl. the following bus protocol has been defined (see figure 4): data transfer may be initiated only when the bus is not busy. during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the clock line is high will be interpreted as control signals. accordingly, the following bus conditions have been defined: bus not busy: both data and clock lines remain high. start data transfer: a change in the state of the data line, from high to low, while the clock is high, defines a start condition. stop data transfer: a change in the state of the data line, from low to high, while the clock line is high, defines the stop condition. data valid: the state of the data line represents valid da ta when, after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line must be changed during the low period of the clock signal. th ere is one clock pulse per bit of data.
ds1621 7 of 16 each data transfer is initiated with a start condition and terminated with a stop condition. the number of data bytes transferred between start and stop conditions is not limited and is determined by the master device. the information is transferre d byte-wise and each receiver acknowledges with a ninth-bit. within the bus specifications a regular mode (100khz clock rate) and a fast m ode (400khz clock rate) are defined. the ds1621 works in both modes. acknowledge: each receiving device, when addressed, is ob liged to generate an acknowledge after the reception of each byte. the master device must generate an extra clock pulse which is associated with this acknowledge bit. a device that acknowledges must pull down the sda line during the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowledge related clock pulse. of course, setup and hold ti mes must be taken into acc ount. a master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave must leave the data line high to enab le the master to generate the stop condition. figure 4. data transfer on 2-wire serial bus figure 4 details how data transfer is accomplishe d on the 2-wire bus. depending upon the state of the r/w bit, two types of data transfer are possible: 1. data transfer from a master transmitter to a slave receiver . the first byte transmitted by the master is the slave address. next follows a number of data bytes. the slave returns an acknowledge bit after each received byte. 2. data transfer from a slave tr ansmitter to a master receiver . the first byte, the slave address, is transmitted by the master. the slave then returns an acknowledge bit. next follows a number of data bytes transmitted by the slave to the master. the master returns an acknowledge bit after all received bytes other than the last byte. at the end of the last received byte, a ?not acknowledge? is returned. the master device generates all of the serial clock pulses and the start and stop conditions. a transfer is ended with a stop condition or with a repeated star t condition. since a repeated start condition is also the beginning of the next serial transfer, the bus will not be released.
ds1621 8 of 16 the ds1621 may operate in the following two modes: 1. slave receiver mode: serial data and clock are received thr ough sda and scl. after each byte is received an acknowledge bit is transmitted. start and stop conditions are recognized as the beginning and end of a serial tran sfer. address recognition is perform ed by hardware after reception of the slave address and direction bit. 2. slave transmitter mode: the first byte is received and handled as in the slave receiver mode. however, in this mode the direction bit will indicate that the transfer direction is reversed. serial data is transmitted on sda by the ds1621 while the seri al clock is input on scl. start and stop conditions are recognized as the beginning and end of a serial transfer. slave address a control byte is the first byte received following the start condition from the master device. the control byte consists of a 4-bit c ontrol code; for the ds1621, this is set as 1001 binary for read and write operations. the next 3 bits of the control byte are th e device select bits (a2, a1, a0). they are used by the master device to select which of eight devices are to be accessed. these bits are in effect the 3 least significant bits of the slave address. the last bit of the control byte (r/ w ) defines the operation to be performed. when set to a ?1? a read operation is selected, when set to a ?0? a write operation is selected. following the start condition the ds1621 monitors th e sda bus checking the device type identifier being transmitted. upon receiving the 1001 code and appr opriate device select bits, the slave device outputs an acknowledge signal on the sda line.
ds1621 9 of 16 figure 5. 2-wire serial communication with ds1621
ds1621 10 of 16 command set data and control information is r ead from and written to the ds1621 in the format shown in figure 5. to write to the ds1621, the master will issue the slave address of the ds1621 and the r/ w bit will be set to ?0?. after receiving an acknowledge, the bus master provides a command protocol. after receiving this protocol, the ds1621 will issue an acknowledge and th en the master may send data to the ds1621. if the ds1621 is to be read, the master must send the comma nd protocol as before an d then issue a repeated start condition and the control byte again, this time with the r/ w bit set to ?1? to allow reading of the data from the ds1621. the command set for the ds1621 as shown in table 3 is as follows: read temperature [aah] this command reads the last temperature conversion result. the ds1621 will send 2 bytes, in the format described earlier, which are the contents of this register. access th [a1h] if r/ w is ?0? this command writes to the th (high temperature) register. after issuing this command, the next 2 bytes written to the ds1621, in the same format as described for reading temperature, will set the high temperature threshold for operation of the t out output. if r/ w is ?1? the value stored in this register is read back. access tl [a2h] if r/ w is ?0? this command writes to the tl (low temperature) register. after issuing this command, the next 2 bytes written to the ds1621, in the same format as described for reading temperature, will set the high temperature threshold for operation of the t out output. if r/ w is ?1? the value stored in this register is read back. access config [ach] if r/ w is ?0? this command writes to the configurati on register. after issuing this command, the next data byte is the value to be written into the configuration register. if r/ w is ?1? the next data byte read is the value stored in the configuration register. read counter [a8h] this command reads the value count_remain. this command is valid only if r/ w is ?1?. read slope [a9h] this command reads the value count_per_c. this command is valid only if r/ w is ?1?. start convert t [eeh] this command begins a temperature conversion. no fu rther data is required. in one-shot mode the temperature conversion will be perfo rmed and then the ds1621 will remain idle. in continuous mode this command will initiate c ontinuous conversions. stop convert t [22h] this command stops temperature conversion. no furthe r data is required. this command may be used to halt a ds1621 in continuous conversi on mode. after issuing this command, the current temperature measurement will be completed and the ds1621 will remain idle until a start convert t is issued to resume continuous operation.
ds1621 11 of 16 table 3. ds1621 command set instruction description protocol 2-wire bus data after issuing protocol notes temperature conversion commands read temperature read la st converted temperature value from temperature register. aah read counter reads value of count_remain a8h read slope reads value of the count_per_c a9h start convert t initiates temperature conversion. eeh idle 1 stop convert t halts temper ature conversion. 22h idle 1 thermostat commands access th reads or writes high temperature limit value into th register. a1h 2 access tl reads or writes low temperature limit value into tl register. a2h 2 access config reads or writes configuration data to configuration register. ach 2 notes: 1. in continuous conversion mode a stop convert t command will halt con tinuous conversion. to restart the start convert t command must be issu ed. in one-shot mode a start convert t command must be issued for every temperature reading desired. 2. writing to the e 2 requires a maximum of 10ms at room temperature. after issuing a write command, no further writes should be requested for at least 10ms.
ds1621 12 of 16 memory function example example: bus master sets up ds1621 for con tinuous conversion and th ermostatic function. bus master mode ds1621 mode data (msb first) comments tx rx start bus master initiates a start condition. tx rx bus master sends ds1621 address; r/ w = 0. rx tx ack ds1621 generates acknowledge bit. tx rx ach bus master sends access config command protocol. rx tx ack ds1621 generates acknowledge bit. tx rx 02h bus master sets up ds1621 for output polarity active high, continuous conversion. rx tx ack ds1621 generates acknowledge bit. tx rx start bus master generates a repeated start condition. tx rx bus master sends ds1621 address; r/ w = 0. rx tx ack ds1621 generates acknowledge bit. tx rx a1h bus master sends access th command. rx tx ack ds1621 generates acknowledge bit. tx rx 28h bus master sends first byte of data for th limit of +40c. rx tx ack ds1621 generates acknowledge bit. tx rx 00h bus master sends second byte of data for th limit of +40c. rx tx ack ds1621 generates acknowledge bit. tx rx start bus master generates a repeated start condition. tx rx bus master sends ds1621 address; r/ w = 0. rx tx ack ds1621 generates acknowledge bit. tx rx a2h bus master sends access tl command. rx tx ack ds1621 generates acknowledge bit. tx rx 0ah bus master sends first byte of data for tl limit of +10c. rx tx ack ds1621 generates acknowledge bit. tx rx 00h bus master sends second byte of data for tl limit of +10c. rx tx ack ds1621 generates acknowledge bit. tx rx start bus master generates a repeated start condition. tx rx bus master sends ds1621 address; r/ w = 0. rx tx ack ds1621 generates acknowledge bit. tx rx eeh bus master sends st art convert t command protocol. rx tx ack ds1621 generates acknowledge bit. tx rx stop bus master initiates stop condition.
ds1621 13 of 16 absolute maximum ratings* voltage on any pin relative to ground -0.5v to +6.0v operating temperature range -55 c to +125 c storage temperature range -55 c to +125 c soldering temperature see ipc/jedec j-std-020a specification * this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operating conditions parameter symbol min typ max units notes supply voltage v dd 2.7 5.5 v 1 dc electrical characteristics (-55c to +125c; v dd = 2.7v to 5.5v) parameter symbol condition min typ max units notes thermometer error t err 0c to 70c 3.0v v dd 5.5v ? c 0c to 70c 2.7v v dd 3.0v 1 c -55c to +0c and 70c to 125c 2 c thermometer resolution 12 bits low level input voltage v il 0.5 0.3 v dd v high level input voltage v ih 0.7 v dd v dd +0.3 v pulse width of spikes which must be suppressed by the input filter t sp fast mode 0 50 ns v ol1 3 ma sink current 0 0.4 v low level output voltage v ol2 6 ma sink current 0 0.6 v input current each i/o pin 0.4 ds1621 14 of 16 active supply current i cc temperature conversion -55c to +85c temperature conversion +85c to +125c e 2 write communication only 1000 1250 400 110 a 3, 4 standby supply current i stby 1 a 3, 4 v oh 1 ma source 2.4 v thermostat output (t out ) output voltage v ol 4 ma sink 0.4 v
ds1621 15 of 16 ac electrical characteristics (-55c to +125c; v dd = 2.7v to 5.5v) parameter symbol condition min typ max units notes temperature conversion time t tc 750 ms nv write cycle time t wr 0c to 70c 4 10 ms 10 scl clock frequency f scl fast mode standard mode 0 0 400 100 khz bus free time between a stop and start condition t buf fast mode standard mode 1.3 4.7 s hold time (repeated) start condition t hd:sta fast mode standard mode 0.6 4.0 s 5 low period of scl clock t low fast mode standard mode 1.3 4.7 s high period of scl clock t high fast mode standard mode 0.6 4.0 s setup time for a repeated start condition t su:sta fast mode standard mode 0.6 4.7 s data hold time t hd:dat fast mode standard mode 0 0 0.9 s 6, 7 data setup time t su:dat fast mode standard mode 100 250 ns 8 rise time of both sda and scl signals t r fast mode standard mode 20+0.1c b 300 1000 ns 9 fall time of both sda and scl signals t f fast mode standard mode 20+0.1c b 300 300 ns 9 setup time for stop condition t su:sto fast mode standard mode 0.6 4.0 s capacitative load for each bus line c b 400 pf all values referred to v ih =0.9 v dd and v il =0.1 v dd . ac electrical characteristics (-55c to +125c; v dd = 2.7v to 5.5v) parameter symbol min typ max units notes input capacitance c i 5 pf
ds1621 16 of 16 notes: 1. all voltages are referenced to ground. 2. i/o pins of fast mode devices must not obstruct the sda and scl lines if v dd is switched off. 3. i cc specified with t out pin open. 4. i cc specified with v cc at 5.0v and sda, scl = 5.0v, 0c to 70c. 5. after this period, the first clock pulse is generated. 6. a device must internally provide a hold time of at least 300ns for the sda si gnal (referred to the v ih min of the scl signal) in order to bridge the undefined region of the falling edge of scl. 7. the maximum t hd:dat has only to be met if the device does not stretch the low period (t low ) of the scl signal. 8. a fast mode device can be used in a st andard mode system, but the requirement t su:dat >250ns must then be met. this will automatically be the case if the device does not stretch the low period of the scl signal. if such a device does stretch the low period of the scl signal, it must output the next data bit to the sda line t rmax + t su:dat = 1000 + 250 = 1250ns before the scl line is released. 9. c b ?total capacitance of one bus line in pf. 10. writing to the nonvolatile memory should only take place in the 0 c to 70 c temperature range. timing diagram
english ? ???? ? ??? ? ??? what's new products solutions design appnotes support buy company members ds1621 part number table notes: see the ds1621 quickview data sheet for further information on this product family or download the ds1621 full data sheet (pdf, 248kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming conventions . 4. * some packages have variations, listed on the drawing. "pkgcode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis ds1621 pdip;8 pin;300 dwg: 56-g5005-000a (pdf) use pkgcode/variation: p8-9 * -55c to +125c rohs/lead-free: no materials analysis ds1621+ pdip;8 pin;300 dwg: 56-g5005-000a (pdf) use pkgcode/variation: p8+1 * -55c to +125c rohs/lead-free: yes materials analysis ds1621s/t&r soic;8 pin;150 dwg: 56-g2008-001c (pdf) use pkgcode/variation: s8-4 * -55c to +125c rohs/lead-free: no materials analysis
ds1621s+t&r soic;8 pin;150 dwg: 56-g2008-001c (pdf) use pkgcode/variation: s8+2 * -55c to +125c rohs/lead-free: yes materials analysis ds1621v soic;8 pin;208 dwg: 56-g4010-001b (pdf) use pkgcode/variation: w8-2 * -55c to +125c rohs/lead-free: no materials analysis ds1621s soic;8 pin;150 dwg: 56-g2008-001c (pdf) use pkgcode/variation: s8-4 * -55c to +125c rohs/lead-free: no materials analysis ds1621s+ soic;8 pin;150 dwg: 56-g2008-001c (pdf) use pkgcode/variation: s8+2 * -55c to +125c rohs/lead-free: yes materials analysis ds1621v+ soic;8 pin;208 dwg: 56-g4010-001b (pdf) use pkgcode/variation: w8+2 * -55c to +125c rohs/lead-free: yes materials analysis ds1621v/t&r soic;8 pin;208 dwg: 56-g4010-001b (pdf) use pkgcode/variation: w8-2 * -55c to +125c rohs/lead-free: no materials analysis ds1621v+t&r soic;8 pin;208 dwg: 56-g4010-001b (pdf) use pkgcode/variation: w8+2 * -55c to +125c rohs/lead-free: yes materials analysis didn't find what you need? contact us: send us an email copyright 2007 by maxim integrated products, dallas semiconductor ? legal notices ? privacy policy

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